An active matrix liquid crystal display device is configured to sandwich liquid crystal between a common electrode and multiple pixel electrodes. Then, an active element such as a TFT (Thin Film Transistor) is provided for each pixel electrode, and use of the active element enables control of whether the voltage of source wiring should be set for the pixel electrode.
The common electrode is set to a predetermined potential, and each pixel electrode is set to a potential corresponding to each pixel value of an image to be displayed. Here, a state where the potential of the pixel electrode is higher than the potential of the common electrode is referred to as positive polarity. On the other hand, a state where the potential of the pixel electrode is lower than the potential of the common electrode is referred to as negative polarity.
FIG. 39 is an illustrative diagram showing an example of the potential of the common electrode and potentials for setting pixels to white or black at each polarity. Here, a description will be made by taking normally white mode as an example. The potential of the common electrode is denoted as VCOM. Vpb, Vpw, VCOM, Vnw and Vnb shown in FIG. 39 represent potentials, respectively, where Vnb<Vnw<VCOM<Vpw<Vpb. When pixels are to be displayed in black at the positive polarity, the potential of source lines connected to the pixels may be set to Vpb, while when the pixels are to be displayed in white at the positive polarity, the potential of the source lines connected to the pixels may be set to Vpw. Further, when the pixels to be displayed are set to gray scale display at the positive polarity, the potential of the source lines connected to the pixels may be set to a potential higher than Vpw and lower than Vpb. On the other hand, when the pixels are to be displayed in black at the negative polarity, the potential of the source lines connected to the pixels may be set to Vnb, while when the pixels are to be displayed in white at the negative polarity, the potential of the source lines connected to the pixels may be set to Vnw. Further, when the pixels to be displayed is set to gray scale display at the negative polarity, the potential of the source lines connected to the pixels may be set to a potential lower than Vnw and higher than Vnb.
In an active matrix liquid crystal display device, it is preferred to drive pixels in such a manner that few pixels having the same polarity will be disposed side by side in succession to prevent crosstalk. FIG. 40 is an illustrative diagram showing a typical liquid crystal display device. As shown in FIG. 40, pixel electrodes 50 are arranged in a matrix, and a TFT 51 is provided for each pixel electrode. In FIG. 40, pixels for red are denoted as “R,” pixels for green are denoted as “G,” and pixels for blue are denoted as “B.”
As shown in FIG. 40, a source driver 60 is provided to set the potential of each of source lines S1 to Sn, and each source line is connected to each of output terminals D1 to Dn of the source driver 60. In the example shown in FIG. 40, each TFT 51 is provided on the left side of the pixel electrode 50, and connected to the source line located on the left side of the pixel electrode 50. Further, gate lines G1, G2, G3, . . . are provided for each row of pixels, and each gate line is connected to the TFT 51 of the pixel electrode in the row. The gate lines are selected sequentially and the TFTs 51 in the selected row put the pixel electrodes 50 and the source lines into a conductive state. As a result, the pixel electrodes 50 in the selected row are controlled to have potentials equal to the potentials of the source lines located on the left side of the pixel electrodes, respectively. On the other hand, the TFTs 51 in the unselected rows put the pixel electrodes 50 and the source lines into a non-conductive state. Thus, the gate lines are selected sequentially, and the source driver 60 sets the potential of each source line to a potential corresponding to the pixel value of each pixel in the selected row to display an image according to image data.
For example, in the typical liquid crystal display device shown in FIG. 40, the source driver 60 controls adjacent pixels to have different polarities as follows: Upon selection of gate lines in an odd-numbered row in certain one frame, the source driver 60 sets the potentials of source lines S1, S3, S5, . . . in an odd-numbered column higher than the potential VCOM of the common electrode (not shown), and sets the potentials of source lines S2, S4, S6, . . . in even-numbered columns lower than VCOM. Upon selection of gate lines in an even-numbered row, the source driver 60 sets the potentials of source lines S1, S3, S5, . . . in the odd-numbered columns lower than VCOM, and sets the potentials of source lines S2, S4, S6, . . . in the even-numbered columns higher than VCOM. As a result, as shown in FIG. 40, adjacent pixels are controlled to alternate the positive polarity and the negative polarity. In FIG. 40, “+” represents the positive polarity and “−” represents the negative polarity.
Further, the source driver 60 changes the potentials of the source lines to reverse the polarity of each pixel each time the frame is switched. In other words, upon selection of gate lines in an odd-numbered row in the next frame that follows the above-mentioned frame, the source driver 60 sets the potentials of source lines in the odd-numbered columns lower than VCOM, and sets the potentials of source lines in the even-numbered columns higher than VCOM. On the other hand, upon selection of gate lines in an even-numbered row, the source driver 60 sets the potentials of source lines in the odd-numbered columns higher than VCOM, and sets the potentials of source lines in the even-numbered columns lower than VCOM. As a result, the polarity of each pixel becomes opposite to the polarity of each pixel shown in FIG. 40.
In this driving method, each time the selected row is switched to another, the potential of each source line is changed from a potential higher than VCOM to a potential lower than VCOM, or from the potential lower than VCOM to the potential higher than VCOM. This increases power requirements. Particularly, since the power consumption of a liquid crystal display panel is proportional to the square of a difference between the potentials of the source line upon switching between selected rows, the power consumption increases as the number of times of switching the potential of the source line increases.
There is proposed a liquid crystal display device capable of controlling adjacent pixels to have different polarities while reducing power consumption (see Paragraph Nos. 0008 to 0018 and FIGS. 1 to 6 in Japanese Patent Application Publication (JP-P2009-181100A)). In the liquid crystal display device described in JP-P2009-181100A, TFTs connected to gate lines in an odd-numbered row are formed on the left side of source lines, and TFTs connected to gate lines in an even-numbered row are formed on the right side of source lines. This structure can prevent a change in the potential of each source line from a potential higher than VCOM to a potential lower than VCOM, or from a potential lower than VCOM to a potential higher than VCOM during each selection period.
The liquid crystal display device described in JP-P2009-181100A also includes a distribution transistor for switching the source lines to be connected to the TFTs to switch the output of a driver circuit among multiple source lines within one row selection period. For example, one of output terminals of the driver circuit is switched sequentially to the leftmost source line, the third source line from the left, the fifth source line from the left and so on within one row selection period. Similarly, another output terminal is switched sequentially to the second source line from the left, the fourth source line from the left, the sixth source line from the left, and so on within the selection period.
Further, a liquid crystal display device configured to switch between sampling timings of sampling and latching serially input image data per horizontal scanning period is described on the first page of Japanese Patent Application Publication (JP-P2006-71891A) and the like.
In the liquid crystal display device described in JP-P2009-181100A, one of the output terminals of the driver circuit is switched sequentially to the leftmost source line, the third source line from the left, the fifth source line from the left and so on within one row selection period. Similarly, another output terminal is also switched sequentially to the second source line from the left, the fourth source line from the left, the sixth source line from the left and so on within the selection period. Therefore, input data for respective pixels have to be output while changing the order of input of the data. FIG. 41 is an illustrative diagram showing switching between data sequences in a driving method for the liquid crystal display device described in JP-P2009-181100A. It is assumed here that pixels in each row are disposed in the following order: R, G, B, R, G, B, . . . .
For example, suppose that data on respective pixels are input as shown in FIG. 41(a) as data on respective pixels in the first row in the following order: (R1, G1, B1), (R2, G2, B2), . . . . Since potentials are so set that the polarities of adjacent pixels are switched alternately, it is assumed that output potentials R1+, G1−, B1+, R2−, G2+, B2−, . . . are defined in response to R1, G1, B1, R2, G2, B2, . . . (see FIG. 41(b)). Note that “+” represents a potential higher than VCOM and “−” represents a potential lower than VCOM.
In the liquid crystal display device described in JP-P2009-181100A, one of the output terminals of the driver circuit first outputs R1+ within the selection period of the first row, and the output terminal is connected to the leftmost source line at this time. Next, the output terminal outputs B1+ within the selection period, and is connected to the third source line from the left. Further, the output terminal outputs G2+ within the selection period, and is connected to the fifth source line from the left. Thus, this output terminal outputs data within one selection period as shown in FIG. 41 (c) in the following order: R1+, B1+, G2+, . . . . Another output terminal first outputs G1− within the selection period of the first row, and the output terminal is connected to the second source line from the left at this time. Next, the output terminal outputs R2− within the selection period, and is connected to the fourth source line from the left. Further, the output terminal outputs B2− within the selection period, and is connected to the sixth source line from the left. Thus, this output terminal outputs data within one selection period as shown in FIG. 41 (d) in the following order: G1−, R2−, B2−, . . . . Since the order of signal output does not correspond to the order of input as R1, G1, B1, R2, G2, B2, . . . , the order of output must be changed in the driver circuit, resulting in complicated data output control because of the need to change the order of data.
Further, since each output terminal has to set the potentials of multiple pixel electrodes within one selection period, there is a possibility that a medium- or large-sized liquid crystal display panel with a large number of pixels may not be able to set a potential necessary for each pixel electrode.